Digital Entities Action Committee

Building Intelligent Machines -- from Chips to Brains
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Items to Add:
1. crossnets
2. markram monsters
3. big strong chips
In Yale Patt's talk (from Univ. Tx, EE Dept.) to the NU ECE program today (4/19/06), he made the point that a chip with billions of transistors can spend/dedicate some millions of transistors to carrying out narrow-purpose tasks, ones that are dedicated to specific algorithms/instruction sets.  Even with today's current chip capabilities, we are still far from reaching the levels of computational performance that could potentially be achieved by re-engineering chip architecture in various important ways.  The problem is that he thinks he needs a student with a 350 IQ to do this and so requested one from the Registrar.  They did not have one but offered to send him 10 students with IQ's of 35.  Still chips are getting more powerful and more complex all the time, and very smart people are working furiously on this specific problem because of the MASSIVE amounts of money involved. 
     His view of the next generation chip is a Holistic one in which the relevant levels operations are all mutually informing one another creating something that is greater than what could be accomplished by focusing on just one level.  The levels are: problem -- algorithms -- program -- instruction set architecture -- microarchitecture -- circuits -- electrons.  Traditionally, the one might focus upon circuits and microarchitecture, but by integrating information across levels, and more creatively using the billions of available transistors (if you need a William the Refrigerator Perry device that will be used only 0.1% of the time, build one in-- you will have a better chip for your efforts). 
     In terms of information processing capacity (and chip-brain comparisons) it is insufficient to think purely in terms of flops (I think).  Rather, I think there are several unique qualities within the "realm" of information processing (IP) and that we have to consider each separately and consider how they combine to develop a better picture of IP/IQ.  For both devices, I would specify: aggregate bandwith of communications (Shannon msmt.), rate of bit flips per sec (how related to flops?), and algorithm capabilities to be the 3 most clear attributes that together define IP (and perhaps IQ). 
     In regards to chip vs. brain comparisons, I suspect that the great divergence of neural outputs from each individual neuron (which may synapse onto 10,000 other neurons), which provides a vast degree of interconnection which is perhaps at an extremely opposite end of spectrum from chip architectures.  [check with ECE on basic architectures and utility of crossnets]. 

4th Millenium